• Design Technology Co-Optimization of 3D-monolithic standard cells and SRAM exploiting dynamic back-bias for ultra-low-voltage operation

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  Design Technology Co-Optimization of 3D-monolithic standard cells and SRAM exploiting dynamic back-bias for ultra-low-voltage operation

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• Understanding how small variations in photoresist shape significantly impact multi-patterning yield

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  Understanding how small variations in photoresist shape significantly impact multi-patterning yield

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• FinFET Front End of Line FEOL Process Integration

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  FinFET Front End of Line FEOL Process Integration

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